Initial gwin-skill: Gowin ACG525 full toolchain skill for agents.

Co-authored-by: Cursor <cursoragent@cursor.com>
This commit is contained in:
Administrator
2026-09-14 20:18:41 +08:00
co-authored by Cursor
commit 1b1a68ae28
16 changed files with 765 additions and 0 deletions
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open_project template.gprj
set_option -output_base_name template
set_option -synthesis_tool gowinsynthesis
set_option -top_module top
set_option -use_sspi_as_gpio 1
set_option -use_mspi_as_gpio 1
set_option -use_ready_as_gpio 1
set_option -use_done_as_gpio 1
set_option -use_cpu_as_gpio 1
run all
exit
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IO_LOC "clk" T9;
IO_PORT "clk" IO_TYPE=LVCMOS33 PULL_MODE=NONE BANK_VCCIO=3.3;
IO_LOC "rst_n" H5;
IO_PORT "rst_n" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
IO_LOC "led0" C1;
IO_PORT "led0" IO_TYPE=LVCMOS33 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=3.3;
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create_clock -name clk -period 20.000 -waveform {0.000 10.000} [get_ports {clk}]
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// Minimal ACG525 blink template — LED0 on C1, clk T9, rst_n H5
module top (
input wire clk,
input wire rst_n,
output wire led0
);
reg [24:0] cnt;
always @(posedge clk or negedge rst_n) begin
if (!rst_n)
cnt <= 25'd0;
else
cnt <= cnt + 1'b1;
end
assign led0 = cnt[24];
endmodule
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<?xml version="1" encoding="UTF-8"?>
<!DOCTYPE gowin-fpga-project>
<Project>
<Template>FPGA</Template>
<Version>5</Version>
<Device name="GW5A-25A" pn="GW5A-LV25UG324C2/I1">gw5a25a-008</Device>
<FileList>
<File path="src/top.v" type="file.verilog" enable="1"/>
<File path="src/top.cst" type="file.cst" enable="1"/>
<File path="src/top.sdc" type="file.sdc" enable="1"/>
</FileList>
</Project>