99 lines
1.8 KiB
Markdown
99 lines
1.8 KiB
Markdown
# ACG525 引脚参考
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来源：`tool-chain/fpga/ACG525_EDA开发板引脚信息表.xlsx`。
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器件：`GW5A-LV25UG324C2/I1`。电平默认 3.3 V LVCMOS。
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## 系统
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| 信号 | FPGA 管脚 | 说明 |
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|------|-----------|------|
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| CLK | T9 | 50 MHz 系统时钟 |
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| key5 / rst_n | H5 | 独立按键，建议作复位，低有效 |
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## 独立按键
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| 信号 | 管脚 |
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|------|------|
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| key0 | D1 |
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| key1 | F2 |
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| key2 | F1 |
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| key3 | H2 |
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| key4 | H1 |
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| key5 | H5 |
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## LED（部分）
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| 信号 | 管脚 |
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|------|------|
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| LED0 | C1 |
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| LED1 | D3 |
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| LED2 | F5 |
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| LED3 | G1 |
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| LED4 | E1 |
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| LED5 | F3 |
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| LED6 | H3 |
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| LED7 | K5 |
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## TFT / LCD（2×18 RGB565）
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| 信号 | 管脚 | 备注 |
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|------|------|------|
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| LCD_CLK | N9 | 像素时钟 |
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| LCD_HSYNC | R7 | |
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| LCD_VSYNC | T7 | |
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| LCD_DE | T6 | 数据有效 |
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| LCD_BL | V6 | 背光，高亮 |
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| LCD_RESET / LCD_GPIO27 | P8 | 常驱高 |
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| LCD_R7 | V7 | R[4] in RGB565 port |
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| LCD_R6 | U7 | |
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| LCD_R5 | V5 | |
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| LCD_R4 | U5 | |
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| LCD_R3 | T4 | |
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| LCD_G7 | P11 | |
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| LCD_G6 | N10 | |
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| LCD_G5 | V12 | |
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| LCD_G4 | T12 | |
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| LCD_G3 | V8 | |
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| LCD_G2 | U8 | |
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| LCD_B7 | M10 | |
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| LCD_B6 | T8 | |
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| LCD_B5 | R8 | |
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| LCD_B4 | N11 | |
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| LCD_B3 | M11 | |
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HDL 端口常用打包：
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```text
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lcd_r[4:0] ← LCD_R[7:3]
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lcd_g[5:0] ← LCD_G[7:2]
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lcd_b[4:0] ← LCD_B[7:3]
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```
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## 触摸（可选，刷屏可不接）
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| 信号 | 管脚 |
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|------|------|
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| TP_CS | R5 |
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| TP_SCK | T3 |
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| TP_MOSI | T5 |
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| TP_MISO | R3 |
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| TP_PEN | N6 |
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## VGA（若用 VGA 座，非 TFT 排针）
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| 信号 | 管脚 |
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|------|------|
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| VGA_HS | N8 |
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| VGA_VS | M8 |
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## CST 片段示例（时钟+复位）
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```text
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IO_LOC "clk" T9;
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IO_PORT "clk" IO_TYPE=LVCMOS33 PULL_MODE=NONE BANK_VCCIO=3.3;
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IO_LOC "rst_n" H5;
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IO_PORT "rst_n" IO_TYPE=LVCMOS33 PULL_MODE=UP BANK_VCCIO=3.3;
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```
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完整 TFT 约束见工作区 `proj1/src/tft_top.cst`。
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